1. Field of the Invention
The present invention relates to an apparatus and method for exchanging status information between circuits, and more particularly, to an apparatus and method for exchanging information between circuits with a limited number of connection points.
2. Background of the Related Art
In a personal mobile communication base station system and in other systems, circuit board assemblies (hereinafter xe2x80x9cboardsxe2x80x9d) are duplicated. In order to implement board duplication, a duplication exclusive signal is used and additional software processing may be required. Additional logic circuit and a edge connector pin are required to create the duplication exclusive signal.
FIG. 1 is a drawing illustrating an apparatus for exchanging status information between boards in accordance with the related art. As shown therein, an apparatus for exchanging status information between boards includes a connecting unit 30 for connecting a first board 10 to a second board 20 to transmit status information to the mutually exclusive board. The first board 10 includes a status information transmitting unit 11 to buffer status information (ICD[0:n]) of the first board 10 and transmit the buffered status information and, a receiving unit 12 to receive status information (XCD[0:n]) of the second board. The first board 10 also includes a field programmable gate array (FPGA) 13 to compare the status information ICD[0:n]) of the first board 10 and the status information (XCD[0:n]) of the second board and determine the status (active/standby) of the first and second boards.
The status information transmitting unit 11 and the status information receiving unit 12 include buffers 11a and 12a, respectively, to buffer a signal. The connecting unit 30 includes an edge pin formed at a corner of one side of each board for transmitting and receiving a data to and from a different board or other device.
The FPGA 13 generates the status information (ICD[0:n]) of the first board 10. The generated status information (ICD[0:n]) is outputted through the buffer 11a of the status information transmitting unit 11. The outputted status information is transmitted through the edge pin of the connecting unit 30 to the second board 20.
The status information (XCD[0:n]) of the second board 20 is transmitted through the connecting unit 30 to the buffer 12a of the first board 10, and is buffered by the buffer 12a. Then the buffered status information (BXCD[0:n]) of the second board 20 is received by the FPGA 13.
The FPGA 13 compares the received status for information (BXCD[0:n]) of the second board 20 and the generated status information (ICD[0:n]) of the first board 10, and determines an active state or a standby state of the first board and the second board 10 and 20 according to the result of the comparison.
Generally, in implementing such a board duplication function, if xe2x80x98Nxe2x80x99 bit first board status information (ICD[0:n]) is transmitted through the buffer 11a to the second board, 20 xe2x80x98Nxe2x80x99 number of edge pins are used to output information. In addition, where xe2x80x98Nxe2x80x99 bit second board status information (XCD[0:n]) is received by the first board 10, xe2x80x98Nxe2x80x99 number of edge pins are used to input information. Consequently, 2N number of edge pins are required for exchanging xe2x80x98Nxe2x80x99 bits of status information between the first board 10 and the second board 20.
The related art apparatus for exchanging status information between boards has many problems. For example, the number of pins used for exchanging status information between the first and the second board may be constrained by physical limitations. Thus, where the number of bits of status information to be exchanged is increased, the related art system fails to accommodate the increased information. Other problems also in the related art.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.
An object of the invention is to solve at least the above problems and/or disadvantages and to provide at least the advantage described hereinafter.
Another object of the present invention to provide an apparatus and method for exchanging more bits of status information between boards using a limited number of input/output pins.
Another object of the present invention is to provide an apparatus and method for exchanging status information between boards to effectively implement a board duplication function.
In order to achieve at least the above objects in whole or in part, and in accordance with the purpose of the invention, as embodied and broadly described, there is provided an apparatus for exchanging information between circuits, including first and second circuits, each having the same construction, each configured to transmit first and second information corresponding to the first and second circuits, respectively, to the other circuit corresponding to an address signal, and each other configured to latch the information received from the other circuit through a clock signal, and a connecting unit configured to couple the first and second circuits to enable a data transmission and reception between the first and second circuit.
To further achieve at least the above objects in whole or in part, and in accordance with the purpose of the invention, as embodied and broadly described, there is provided a method for exchanging information between circuits, including transmitting a first reformation to a second circuit and a second information to a first circuit, wherein the first and second information correspond to a first and second address signal, respectively, and latching the first information in the second circuit using a first clock signal and latching the second information in the first circuit using a second clock signal.
To further achieve at least the above objects in whole or in part, and in accordance with the purpose of the invention, as embodied and broadly described, there is provided a method for exchanging status information between circuits including transmitting first status information of a first circuit a second circuit, wherein the first status information corresponds to a first address signal receiving second status information corresponding to a second address signal from the second circuit in a first array, and comparing the first and second status information to determine at least one of a third status information of the first circuit and a fourth status information of the second circuit.
To further achieve at least the above objects in whole or in part, and in accordance with the purpose of the invention, as embodied and broadly described, there is provided a method for exchanging information between circuits, including periodically generating a first address signal of a first circuit, outputting first information corresponding to the first address signal, outputting a first clock signal timed so that the first information can be latched in a second circuit, buffering the first address signal, the first information and the first clock signal for transmission to the second circuit, transmitting second information, a second address and a second clock signal from the second circuit to an information receiving unit of the first circuit, and comparing the second information latched using the transmitted second clock signal with the first information to determine an active state or a standby state of each circuit.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.